;PALASM Design Description ;---------------------------------- Declaration Segment ------------ TITLE RESET DECODAGE ROM/RAM PATTERN KIT DE DECODAGE 8051 REVISION AUTHOR REGIS LETOURNEUR COMPANY DATE 07/23/92 CHIP _KIT8051 PALCE16V8 ;---------------------------------- PIN Declarations --------------- PIN 1 RESET ; CLOCK PIN 2 RESET_BP ; INPUT PIN 3 P1_0 ; INPUT PIN 4 RD ; INPUT PIN 5 PSEN ; INPUT PIN 6 NC1 ; INPUT PIN 7 NC2 ; INPUT PIN 8 NC3 ; INPUT PIN 9 NC4 ; INPUT PIN 10 GND ; INPUT PIN 11 OE ; ENABLE PIN 12 OUT1 COMBINATORIAL ; OUTPUT PIN 13 RAMDATA COMBINATORIAL ; OUTPUT PIN 14 RAMPROG COMBINATORIAL ; OUTPUT PIN 15 RESIN COMBINATORIAL ; OUTPUT PIN 16 OE_RAM COMBINATORIAL ; OUTPUT PIN 17 BOOT_BAR COMBINATORIAL ; OUTPUT PIN 18 OE_ROM COMBINATORIAL ; OUTPUT PIN 19 BOOT REGISTERED ; OUTPUT PIN 20 VCC ; INPUT ;----------------------------------- Boolean Equation Segment ------ EQUATIONS ;CHIP SELECT ROM BOOT = /BOOT BOOT_BAR = /BOOT BOOT.CLKF = RESET ;OUTPUT ENABLE RAM OE_RAM = RD * ( PSEN + /BOOT ) ;OUTPUT ENABLE ROM OE_ROM = PSEN + BOOT ;RESTART BOUTON POUSSOIR/TELECHARGEMENT RESIN = RESET_BP * ( P1_0 + BOOT ) ;SELECT ZONE RAM PROGRAMME 64K RAMPROG = PSEN RAMPROG.TRST = BOOT ;SELECT ZONE RAM DATA 64K RAMDATA = /PSEN RAMDATA.TRST = /BOOT ;SORTIE NON CONNECTEE OUT = VCC OUT1 = VCC ;----------------------------------- Simulation Segment ------------ SIMULATION ;-------------------------------------------------------------------